An expansion card (also expansion board, adapter card or accessory card) in computing is a printed circuit board that can be inserted into an expansion slot of a computer motherboard to add additional functionality to a computer system. One edge of the expansion card holds the contacts (the edge connector) that fit exactly into the slot. They establish the electrical contact between the electronics (mostly integrated circuits) on the card and on the motherboard.
Connectors mounted on the bracket allow the connection of external devices to the card. Depending on the form factor of the motherboard and case, around one to seven expansion cards can be added to a computer system. There are also other factors involved in expansion card capacity. For example, some expansion cards need two slots like some NVidia GeForce FX and newer GeForce graphics cards and there is often a space left to aid cooling on some high-end cards.
Some cards are "low-profile" cards, meaning that they take up little physical space. (There is a "low profile PCI card" standard that specifies a much smaller bracket and board area). The group of expansion cards that are used for external connectivity, such as a network, SAN or modem card, are commonly referred to as input/output cards (or I/O cards).
MCA (Micro Channel Architecture) Early 1980's
Micro Channel Architecture (in practice almost always shortened to MCA) was a proprietary 16- or 32-bit parallel computer bus created by IBM in the 1980s for use on their new PS/2 computers.
ISA (Industry Standard Architecture) Mid 80's
ISA originated as an 8-bit system in the IBM PC in 1981, and was extended in 1983 as the XT bus architecture. The newer 16-bit standard, the IBM AT bus, was introduced in 1984. In 1988, the Gang of Nine IBM PC compatible manufacturers put forth the 32-bit EISA standard and in the process retroactively renamed the AT bus to be "ISA" to avoid infringing IBM's trademark on its PC/AT computer.
EISA (Extended Industry Standard Architecture) Late 1988
The Extended Industry Standard Architecture (in practice almost always shortened to EISA and frequently pronounced "eee-suh") is a bus standard for IBM compatible computers. It was announced in late 1988 by PC clone vendors (the "Gang of Nine") as a counter to IBM's use of its proprietary MicroChannel Architecture (MCA) in its PS/2 series.
VLB (VESA Local Bus) Early 1990's
The VESA Local Bus (usually abbreviated to VL-Bus or VLB) was mostly used in personal computers. VESA Local Bus worked alongside the ISA bus; it acted as a high-speed conduit for memory-mapped I/O and DMA, while the ISA bus handled interrupts and port-mapped I/O.
A VLB slot itself was an extension of an existing ISA slot. Indeed, both VLB and ISA cards could be plugged into a VLB slot (although not at the same time.) The extended portion was usually coloured a distinctive brown. This made VLB cards quite long, reminiscent of the expansion cards from the old XT days. The addition resembled a PCI slot.
PCI (Peripheral Component Interconnect) June 22, 1992
The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI), specifies a computer bus for attaching peripheral devices to a computer motherboard. These devices can take any one of the following forms:
The PCI bus is common in modern PCs, where it has displaced ISA and VESA Local Bus as the standard expansion bus, but it also appears in many other computer types. The bus will eventually be succeeded by PCI Express, which is standard in most new computers, and other technologies.
The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing, and protocols. The specification can be purchased from the PCI Special Interest Group (PCISIG).
Although Intel proposed the PCI standard in 1991, it did not achieve popularity until the arrival of Windows 95 (in 1995). This sudden interest in PCI was due to the fact that Windows 95 supported a feature called Plug and Play (PnP), which we'll talk about in the next section.
Work on PCI began at Intel's Architecture Lab circa 1990. PCI 1.0, which was merely a component-level specification, was released on June 22, 1992. PCI 2.0, which was the first to establish standards for the connector and motherboard slot, was released on April 30, 1993. PCI 2.1 was released on June 1, 1995.
64 Bit PCI Architecture is shown in the photo above
AGP (Accelerated Graphics Port) October 1997
The Accelerated Graphics Port (also called Advanced Graphics Port, often shortened to AGP) is a high-speed point-to-point channel for attaching a graphics card to a computer's motherboard, primarily to assist in the acceleration of 3D computer graphics. AGP is often referred to as a 'bus'; however, this is a misnomer - a single AGP controller is only capable of controlling a single device. This is the main reason that almost all mainboards have only a single AGP slot, although motherboards have been built with multiple independent AGP slots. AGP is currently being phased out in favor of PCI Express.
PCI-X (Peripheral Component Interconnect Extended) 1998
PCI-X (Peripheral Component Interconnect Extended) is a computer bus and expansion card standard designed to supersede PCI. It is essentially a faster version of PCI, running at twice the speed, and is otherwise similar in physical implementation and basic design. It has itself been replaced in modern designs by the similar-sounding PCI Express, which features a very different logical design.
PCI-E (Peripheral Component Interconnect - Express) 2004
PCI Express, officially abbreviated as PCI-E or PCIe, is a computer expansion card interface format. It was designed to replace PCI, PCI-X and AGP (graphics card interface). PCIe is based around serial links called lanes. The PCIe 1.1 specification supports x1 (pronounced "by one"), x2, x4, x8, x16, and x32 lanes. In each lane, the most common version PCIe 1.1 carries 250 MB/s in each direction. Every lane of the PCIe is a full duplex link; capable of simultaneous transmit and receive. The PCIe 1.1 bus runs at 2.5 GHz. An explicit clock is not used; instead the data stream is encoded using the 8b/10b scheme, which ensures that there are sufficient transitions within a single 10 bit character to properly and reliably recover the clock. The astute reader will notice that there are 3 times more combinations than characters used. Some of these additional characters are discarded due to an insufficient number of edges within the 10 bit packet to extract the clock. Others are used to encode error commands. Some may be used to provide "DC balancing" so that the wire doesn't acquire an electrical charge. The remainder are simply not used. Therefore, each lane transmits 250 MB/s. The most number of lanes supported is x32, so 250MB/s x 32 x 2 (bi-directionality) is 16GB/s for a theoretical maximum transfer rate.
